The present invention relates to improved IC package, IC prober and connector as well as method of fabricating the same.
FIG. 1 is a schematic view illustrative of a conventional tungsten probe comprising a large number of tungsten pins 142, which are supported by a first supporter 143 at a first side and by a second supporter 144 at a second side. The tungsten pins 142 are aligned so as to have a first pitch at the first side and a second pitch at the second side wherein the first pitch is much smaller than the second pitch. The pitch of the tungsten pins 142 remarkably increases toward the second side from the first side. The first pitch of the tungsten pins 142 at the first side is 100 micrometers, whilst the second pitch of the tungsten pins 142 at the second side is a few millimeters which is larger by 20-30 times than the first pitch.
The above tungsten probe has the following disadvantages. Each of the tungsten pins 142 has a relatively large length. This causes a deterioration in high frequency performance of the tungsten probe. Since it is required to form each pin separately, this increases manufacturing cost. Further, since the second pitch of the tungsten pins is much wider than the first pitch, a large number of the tungsten pins 142 leads to the problem with spatial limitation.
FIG. 2 is a cross sectional elevation view illustrative of a membrane probe which comprises a polyimide film 156, an elastomer 158 which is provided on a first surface of the polyimide film 156, a supporting substrate 157 provided on the elastomer 158, contacts 159 provided on a second surface of the polyimide film 156 and wirings 160 which extend over the second surface of the polyimide film 156 from the contacts outwardly.
The above membrane probe also has the following problem. It is difficult to obtain contacts with all of the terminals on an area of 10 cm.times.10 cm or more due to a difference in level between the wafer and probe. It is also difficult to form a large number of wirings connected to a large number of pins due to a limited wiring area. This means it difficult to obtain connections between the probe card and the external device.
FIG. 3 is a schematic plan view illustrative of a conventional DIP mold package which comprises an IC 162, lead frames 163 extending from the IC package 162 outwardly and connected via wire-bonding to the IC 162 and an epoxy resin 164 molding the IC 162 and the lead frames 163.
The above conventional DIP mold package has the following disadvantages. It is difficult to provide external electrodes in the form of ball grid array in the structural viewpoint. If the IC is assembled into the package by a flip-chip bonding method, it is required to form bumps on the IC or substrate or supply solders. This results in increased numbers of the fabrication processes and also increased manufacturing cost. In view of the assembly, a pitch of the electrodes of the package is required to be 500 micrometers or more, for which reason in order to increase the number of electrodes of the IC, it is required to enlarge a package size.
In order to reduce the package size, it was proposed to combine a chip package with the ball grid array Notwithstanding, the wire-bonding, ball bumps and solders are also required.